Intellectual Property Office

Non-Confidential Disclosures

“Simultaneous Patterning of Features with Gaps using a Combination of Lithographies”

PSU Inv. Disc. No. 2002-2672

Field of the Invention:

Electronics

Inventors:

Gregory McCarty, Jeff Catchmark, Guy Lavallee

Patent status:

A U.S. and PCT patent applications have been filed

Background:

In the production of electronic devices one of the key process steps is the ability to pattern surfaces. The ability to economically produce very high resolution features on a surface will enable continued miniaturization of electronic devices and open up new markets. Specifically in the production of transistors, the ability to produce a few critical features with extremely high resolution is required. The developed combination of techniques allows this type of processing.

Invention description:

A combination of conventional lithographic and of molecular lithographic techniques are used to produce patterned features of desired size and shape. The molecular resist is used to pattern features with separation from just a few nanometers to tens of nanometers. All features of larger size are patterned using standard lithographic techniques. This combination of techniques improves the capabilities of both techniques, allowing features with extremely high resolution to be produced quickly and inexpensively.

Advantages:

• Low cost
  
• High throughput
  
• Extremely high resolution
  
• Adaptable; little optimization required
  

Contact:

Mr. Richard M. Weyer
Sr. Licensing Officer
Intellectual Property Office
The Pennsylvania State University
113 Technology Center
University Park, PA 16802-7000
Phone: (814) 865-6279
Fax: (814) 865-3591
E-mail: rmw4@psu.edu